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Design and Implementation of an OpenFlow Hardware Abstraction Layer

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TitleDesign and Implementation of an OpenFlow Hardware Abstraction Layer
Publication TypeConference Paper
Year of Publication2014
AuthorsParniewicz, D., R. Doriguzzi Corin, Ł. Ogrodowczyk, M. Rashidi Fard, J. Matias, M. Gerola, V. Fuentes, U. Toseef, A. Zaalouk, B. Belter, E. Jacob, and K. Pentikousis
Conference NameSIGCOMM DCC
Month PublishedAugust
Conference date17-22 August 2014
Conference LocationChicago - USA
ISBN Number978-1-4503-2992-7
KeywordsSDN; OpenFlow; Hardware Abstraction; Control Plane; Network Virtualization; DWDM; DOCSIS
Abstract

OpenFlow is a leading standard for Software-Defined Networking (SDN) and has already played a significant role in reshaping network infrastructures. However, a wide range of existing provider domains is still not equipped with a framework that supports wider deployment of an OpenFlow-based control plane beyond Ethernet- dominated networks. We address this gap by introducing a Hardware Abstraction Layer (HAL) which can transform legacy network elements into OpenFlow capable devices. This paper details the functional architecture of HAL, discusses the key design aspects and explains how HAL can support a number of network device classes. In addition, this paper presents the implementation details of HAL for hardware platforms such as DOCSIS (Data over Cable Service Interface Specification) and DWDM (Dense Wave- length Division Multiplexing) which have so far received little attention by the OpenFlow research community despite their wide real-world deployment. Categories